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VN02AN资料 | |
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VN02AN PDF Download |
File Size : 116 KB
Manufacturer:STM Description:Following a period of activity in the powered-up state the power-down state may be re-entered by writing any of the control instructions into the serial control port with the P bit set to 1 as indicated in Table 1. It is recommended that the chip be powered down before writing any additional instruc- tions. In the power-down state, all non-essential circuitry is de-activated and the DX0 (and DX1) outputs are in the high impedance TRI-STATE condition. The coefficients stored in the Hybrid Balance circuit and the Gain Control registers, the data in the LDR and ILR, and all control bits remain unchanged in the power-down state un- less changed by writing new data via the serial control port, which remains active. The outputs of the Interface Latches also remain active, maintaining the ability to monitor and control the SLIC. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:VN02AN 厂 家:STM 封 装:TO220-5 批 号:08+ 数 量:375 说 明:全新原装,长期稳定供应 |
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