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| VIPER50A资料 | |
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VIPER50A PDF Download |
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File Size : 116 KB
Manufacturer:STM Description:Note 1: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the gain error and the offset error have been nulled. Note 2: No missing codes over temperature. Note 3: Conversion time is defined as the number of clock cycles (16) multiplied by the clock period. Note 4: At sample rates below 10ksps, the input full-linear bandwidth is reduced to 5kHz. Note 5: The listed value of three SCLK cycles is given for full-speed continuous conversions. Acquisition time begins on the 14th ris- ing edge of SCLK and terminates on the next falling edge of CNVST. The IC idles in acquisition mode between conversions. Note 6: Undersampling at the maximum signal bandwidth requires the minimum jitter spec for SINAD performance. Note 7: 1.5Msps operation guaranteed for VL > 2.7V. See the Typical Operating Characteristics section for recommended sampling speeds for VL < 2.7V. Note 8: Digital supply current is measured with the VIH level equal to VL, and the VIL level equal to GND. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：VIPER50A 厂 家：STM 封 装：022Y 批 号：08+ 数 量：4100 说 明：全新原装，长期稳定供应 |
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运 费： 所在地： 新旧程度： |
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| 联系人：林小姐 |
| 电 话：086-755-23815997 |
| 手 机：13632589437 |
| QQ：1097182423,2851921558 |
| MSN： |
| 传 真：0755-23815984 |
| EMail：joylin@hongbotong.com |
| 公司地址： 深圳市福田区深南中路3006号佳和大厦B座2007室 |
