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UC3856N资料 | |
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UC3856N PDF Download |
File Size : 116 KB
Manufacturer:TI Description:found in each I/O cell. Each output has individual, pro- grammable I/O tri-state control (OE), output latch clock (CLK), clock enable (CLKEN), and two multiplexer con- trol (MUX0 and MUX1) inputs. Polarity for these signals is programmable for each I/O cell. The MUX0 and MUX1 inputs control a fast 4:1 MUX, allowing dynamic selection of up to four signal sources for a given output. A wider 16:1 MUX can be implemented with the MUX expander feature of each I/O and a propagation delay increase of 2.0ns. OE, CLK, CLKEN, and MUX0 and MUX1 inputs can be driven directly from selected sets of I/O pins. Optional dedicated clock input pins give minimum clock- to-output delays. CLK and CLKEN share the same set of I/O pins. CLKEN disables the register clock when CLKEN = 0. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:UC3856N 厂 家:TI 封 装:DIP-16 批 号:07+ 数 量:20000 说 明:原装正品,大量供应 |
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运 费: 所在地: 新旧程度: |
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