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TLV320DAC23PWR资料 | |
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TLV320DAC23PWR PDF Download |
File Size : 116 KB
Manufacturer:TEXAS Description:The transceiver performs the data parallel-to-serial and serial-to-parallel conversions. The clock extraction functions as a physical layer interface device. The serial transceiver interface operates at a maximum data rate of 2.5 Gbps. Each transmitter latches 18-bit parallel data at a rate based on the supplied reference clock (GTx_CLK). The 18-bit parallel data is internally encoded into 20 bits by framing the 18-bit data with start and stop bits. The resulting 20-bit frame is then transmitted differentially at 20 times the reference clock (GTx_CLK) rate. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:TLV320DAC23PWR 厂 家:TEXAS 封 装:TSSOP28 批 号:0519+ 数 量:1995 说 明:原装正品,长期稳定供应 |
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