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| TLP668J资料 | |
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TLP668J PDF Download |
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File Size : 116 KB
Manufacturer:TOS Description:The TLP668J7 (see TLP668J7/288A datasheet) trans- mitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase- locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of input data are sampled and transmitted. The TLP668J receiver converts the four LVDS data streams back into 28 bits of CMOS/TTL data. At a transmit clock frequency of 75 MHz, 28 bits of TTL data are transmitted at a rate of 525 Mbps per LVDS data channel. Using a 75 MHz clock, the data throughput is 2.10 Gbit/s (262.5 Mbytes/sec). Complete specifications for the TLP668J7 are located in the TLP668J7/TLP668JA datasheet. The TLP668J7 supports clock rates from 20 to 85 MHz. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：TLP668J 厂 家：TOS 封 装：DIP/SOP 批 号：07+ 数 量：2000 说 明：全新库存，专业TOSHIBA供应商 |
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运 费： 所在地： 新旧程度： |
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| 联系人：林小姐 |
| 电 话：086-755-23815997 |
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