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TL494ID

TL494ID资料
TL494ID
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File Size : 116 KB
Manufacturer:TI
Description:The CY7C646xx enhances the line of Cypress EZ-USB chips while maintaining code compatibility. The CY7C646xx builds on the feature set that has already made the EZ-USB family a popular choice for high-integration, high-speed USB applications:  • Soft operation. Program code can be downloaded into on-chip RAM via the USB cable, eliminating the need for external   program memory or mask ROM headaches.  • Enhanced 8051. A speedy four clocks per cycle, plus expanded features.  • Smart SIE. The USB Serial Interface Engine does much of the low-level USB overhead in logic, simplifying the 8051 code.  • DMA for very fast 8-bit or 16-bit transfers. In the fastest (synchronous byte) mode, one byte can be transferred per 48-MHz   clock, or every 20.8 nanoseconds.  • General Programmable Interface (GPIF). A reconfigurable 8- or 16-bit parallel interface allows the CY7C646xx to perform   local bus mastering, and can implement a wide variety of protocols such as ATAPI, printer parallel port, and Utopia.  • Abundant endpoints and buffers. 16x64 byte buffers for bulk/interrupt/control endpoints, 2x1024 byte FIFOs for up to 16   isochronous endpoints.  • Glueless memory expansion. The 8051 16-bit address bus and 8-bit data bus is available, along with strobes RD#, WR#,   OE# and CS#. The buses are brought out on separate pins (not multiplexed, as in the standard 8051), saving one clock per   external memory cycle.  • 48-MHz or 24-MHz 8051 selectable by EEPROM configuration byte.  • Five 8-bit IO ports.  • Optimum 8051 IO efficiency. IO pins can be addressed as external registers (as in EZ-USB) or through 8051 SFR (Special   Function Register) bits for faster operation.  • Four internal FIFOs for glueless interface to ASICs, DSPs, or external logic. These FIFOs can be clocked either by an   internal or external clock, and can operate either synchronously (using strobes and a clock) or asynchronously (using strobes   only). The FIFOs have 8-16 and 16-8 bit conversion modes that simplify interface to external data buses.  • The vectored interrupt system is expanded to accommodate the FIFO flags and DMA systems. Also, the 8051 can clear   the USB (INT2) or the FIFO/DMA (INT4) interrupt request bit for the interrupt currently being serviced by writing an SFR   location, saving time and code in the interrupt service routine.  • 400-kHz or 100-kHz I2C bus controller speed.
 
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  1PCS 100PCS 1K 10K  
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型 号:TL494ID
厂 家:TI
封 装:SMD
批 号:09+
数 量:19500
说 明:全新原装大量长期供应
 
 
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