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TDA3541资料 | |
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TDA3541 PDF Download |
File Size : 116 KB
Manufacturer: Description:The Address Sequencer is a 24-bit programmable address generator. As shown in the Block Diagram, the sequencer consists of 4 functional blocks: the start circuitry, the sequence generator, the crosspoint switch, and the proces- sor interface. The addresses produced by the sequence generator are input into the crosspoint switch. The cross- point switch maps 24 bits of address input to a 24-bit output. This allows for addressing schemes like bit-reverse addressing for FFTs. A programmable delay block is pro- vided to allow the MSW of the output to be skewed from the LSW. This feature may be used to compensate for processor pipeline delay when the sequence generator is configured as two independent 12-bit sequencers. Address Sequencer operation is controlled by values loaded into configuration registers associated with the sequence generator, crosspoint switch, and start circuitry. The configuration registers are loaded through the processor interface. |
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型 号:TDA3541 厂 家: 封 装:DIP16 批 号:06+ 数 量:480 说 明:全新原装正品,优势库存热卖中! |
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