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TC5064BP资料 | |
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TC5064BP PDF Download |
File Size : 116 KB
Manufacturer:TOSHIBA Description: The IDT5T907 2.5V single data rate (SDR) clock buffer is a user-selectable single-ended or differential input to ten single-ended outputs buffer built on advanced metal CMOS technology. The SDR clock buffer fanout from a single or differential input to ten single-ended outputs reduces the loading on the preceding driver and provides an efficient clock distribution network. The IDT5T907 can act as a translator from a differential HSTL, eHSTL, 1.8V/2.5V LVTTL, LVEPECL, or single-ended 1.8V/2.5V LVTTL input to HSTL, eHSTL, 1.8V/2.5V LVTTL outputs. Selectable interface is controlled by 3-level input signals that may be hard-wired to appropriate high-mid-low levels. The IDT5T907 has two output banks that can be asynchronously enabled/ disabled. Multiple power and grounds reduce noise. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:TC5064BP 厂 家:TOSHIBA 封 装:DIP 批 号:00+ 数 量:1061 说 明:原装正品,长期稳定供应 |
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联系人:林小姐 |
电 话:086-755-23815997 |
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公司地址: 深圳市福田区深南中路3006号佳和大厦B座2007室 |