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TB1202N资料 | |
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TB1202N PDF Download |
File Size : 116 KB
Manufacturer:TOSHIBA Description:<Mobile SDRAM> • Power Supply Voltage : 1.7~1.95V • LVCMOS compatible with multiplexed address. • Four banks operation. • MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave). • EMRS cycle with address key programs. • All inputs are sampled at the positive going edge of the system clock. • Burst read single-bit write operation. • Special Function Support. -. PASR (Partial Array Self Refresh). -. Internal TCSR (Temperature Compensated Self Refresh) -. DS (Driver Strength) • DQM for masking. • Auto refresh. • 64ms refresh period (8K cycle). • 1/CS Support. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:TB1202N 厂 家:TOSHIBA 封 装:DIP24 批 号:06+ 数 量:480 说 明:全新原装正品,优势库存热卖中! |
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