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NJM2100D资料 | |
NJM2100D PDF Download |
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File Size : 116 KB
Manufacturer:JRC Description:The 256Mb DDR SDRAM uses a double-data-rate archi- tecture to achieve high-speed operation. The double data rate architecture is essentially a 2n prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write access for the 256Mb DDR SDRAM effectively consists of a sin- gle 2n-bit wide, one clock cycle data transfer at the inter- nal DRAM core and two corresponding n-bit wide, one- half-clock-cycle data transfers at the I/O pins. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:NJM2100D 厂 家:JRC 封 装:DIP8 批 号:9503+ 数 量:882 说 明:全新原装正品,优势库存热卖中! |
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