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| MMBT3906LT1G资料 | |
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MMBT3906LT1G PDF Download |
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File Size : 116 KB
Manufacturer:ON Description:• Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe DQS • Four banks operation • Differential clock inputs(CK and CK) • DLL aligns DQ and DQS transition with CK transition • MRS cycle with address key programs -. Read latency 2, 2.5 (clock) -. Burst length (2, 4, 8) -. Burst type (sequential & interleave) • All inputs except data & DM are sampled at the positive going edge of the system clock(CK) • Data I/O transactions on both edges of data strobe • Edge aligned data output, center aligned data input • DM for write masking only (x4, x8) • Auto & Self refresh • 7.8us refresh interval(8K/64ms refresh) • Maximum burst refresh cycle : 8 • 66pin TSOP II package |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：MMBT3906LT1G 厂 家：ON 封 装：SOT-23 批 号：917 数 量：165000 说 明：原装正品，大量供应 |
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运 费： 所在地： 新旧程度： |
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| 联系人：林小姐 |
| 电 话：086-755-23815997 |
| 手 机：13632589437 |
| QQ：1097182423,2851921558 |
| MSN： |
| 传 真：0755-23815984 |
| EMail：joylin@hongbotong.com |
| 公司地址： 深圳市福田区深南中路3006号佳和大厦B座2007室 |
