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| DWA103N资料 | |
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DWA103N PDF Download |
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File Size : 116 KB
Manufacturer: Description:Active Low Control Input. This is the frame synchronization signal for the input data. When SYNC goes low, it powers on the SCLK and DIN buffers, and the input shift register is enabled. Data is loaded to the shift register on the active edge of the following clocks (power-on default is falling clock edge). In stand-alone mode, the serial interface counts the clocks and data is latched to the shift register on the 16th active clock edge. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：DWA103N 厂 家： 封 装：DIP16 批 号：06+ 数 量：2460 说 明：全新原装正品,优势库存热卖中! |
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| 联系人：林小姐 |
| 电 话：086-755-23815997 |
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