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| CNX83A资料 | |
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CNX83A PDF Download |
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File Size : 116 KB
Manufacturer:QTC/PH Description:FUNCTION When write enable input WE is L, the contents of data inputs D0 to D7 are written into 1-line delay data only memory in syn- chronization with rise edge of write clock input WCK. At this time, the write address counter of 1-line delay data only memory is also incremented simultaneously. The write functions given below are also performed in syn- chronization with rise edge of WCK. When WE is H, a write operation to 1-line delay data only memory is inhibited and the write address counter of 1-line delay data only memory is stopped. When write reset input WRES is L, the write address counter of 1-line delay data only memory is initialized. When read enable input RE is L, the contents of 1-line delay data only memory are output to data outputs Q00 to Q07 and those of 2-line delay data only memory to data outputs Q10 to Q17 in synchronization with the rise of read clock input RCK. At this time, the read address counters of 1-line and 2-line delay data only memories is also incremented simulta- neously. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：CNX83A 厂 家：QTC/PH 封 装：08+ 批 号：DIP-6 数 量：3400 说 明：全新原装，长期稳定供应 |
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运 费： 所在地： 新旧程度： |
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| 联系人：林小姐 |
| 电 话：086-755-23815997 |
| 手 机：13632589437 |
| QQ：1097182423,2851921558 |
| MSN： |
| 传 真：0755-23815984 |
| EMail：joylin@hongbotong.com |
| 公司地址： 深圳市福田区深南中路3006号佳和大厦B座2007室 |
