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CA3240AE

CA3240AE资料
CA3240AE
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File Size : 116 KB
Manufacturer:INTERSIL
Description:Description The CE pin is used for interfacing with the CPU. Should be held high to allow access to the CPU. Incorporates a pull-down resistor. Should be held low or open when the CPU is powered off. Allows a maximum input voltage of 5.5v regardless of supply voltage. The SCLK pin is used to input clock pulses synchronizing the input and output of data to and from the SI and SO pins. Allows a maximum input voltage of 5.5v regardless of supply voltage. The SI pin is used to input data intended for writing in synchronization with the SCLK pin. CMOS input. Allows a maximum input voltage of 5.5v regardless of supply voltage. The SO pin is used to output data intended for reading in synchronization with the SCLK pin. CMOS output.  The /INTR pin is used to output alarm interrupt (Alarm_W) and alarm  interrupt (Alarm_D) and output periodic interrupt signals to the CPU signals.  Disabled at power-on from 0V. N-channel open drain output. Allows a  maximum pull-up voltage of 5.5v regardless of supply voltage.  The 32KOUT pin is used to output 32.768-kHz clock pulses. Enabled at  power-on from 0 volts. Nch. open drain output. The Rx5C348A is designed  to disable 32-kHz clock output in response to a command from the host  computer and the Rx5C348B is designed to keep 32-kHz output enabled.  The OSCIN and OSCOUT pins are used to connect the 32.768-kHz crystal  oscillator (with all other oscillation circuit components built into the  Rx5C348A/B). The VDD pin is connected to the power supply. The VSS pin is grounded.
 
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型 号:CA3240AE
厂 家:INTERSIL
封 装:07+
批 号:DIP8
数 量:1000
说 明:全新原装,长期稳定供应
 
 
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