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AQW227N资料 | |
AQW227N PDF Download |
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File Size : 116 KB
Manufacturer:PAN Description:The F193 is a 4-bit binary synchronous up down (revers- ible) counter It contains four edge-triggered flip-flops with internal gating and steering logic to provide master reset individual preset count up and count down operations A LOW-to-HIGH transition on the CP input to each flip-flop causes the output to change state Synchronous switching as opposed to ripple counting is achieved by driving the steering gates of all stages from a common Count Up line and a common Count Down line thereby causing all state changes to be initiated simultaneously A LOW-to-HIGH transition on the Count Up input will advance the count by one a similar transition on the Count Down input will de- crease the count by one While counting with one clock in- put the other should be held HIGH as indicated in the Function Table The Terminal Count Up (TCU) and Terminal Count Down (TCD) outputs are normally HIGH When the circuit has reached the maximum count state 15 the next HIGH-to- LOW transition of the Count Up Clock will cause TCU to go LOW TCU will stay LOW until CPU goes HIGH again thus effectively repeating the Count Up Clock but delayed by two gate delays Similarly the TCD output will go LOW when the circuit is in the zero state and the Count Down Clock goes LOW Since the TC outputs repeat the clock wave- forms they can be used as the clock input signals to the next higher order circuit in a multistage counter TCU e Q0 Q1 Q2 Q3 CPU |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:AQW227N 厂 家:PAN 封 装:DIP/SOP 批 号:07+ 数 量:2000 说 明: |
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运 费: 所在地: 新旧程度: |
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