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SN74LVC02A的技术资料

来源:深圳市宏博通电子有限公司 发布时间:2009/4/16 15:56:52 浏览点击数:1783

SN74LVC02A的产品特征:
● EPIC TM (Enhanced-Performance Implanted CMOS) Submicron Process
● Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
● Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C
● Inputs Accept Voltages to 5.5 V
● ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
● Latch-Up Performance Exceeds 250 mA Per JESD 17
● Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW) Packages, Ceramic Flat (W), Chip Carriers
   (FK), and DIPs (J)


SN74LVC02A的技术参数:
Supply-voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  –0.5 V to 6.5 V
Input-voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  –0.5 V to 6.5 V
Output-voltage range, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . ....–0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–50 mA
Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Package thermal impedance, qJA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
                                                                          DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . 158°C/W
                                                                          PW package . . . . . . . . . . . . . . . . . . . . . . . . . . .170°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. –65°C to 150°C
NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
             2. The value of VCC is provided in the recommended operating conditions table.
             3. The package thermal impedance is calculated in accordance with JESD 51.


SN74LVC02A的产品描述:
The SN54LVC02A quadruple 2-input positive- NOR gate is designed for 2.7-V to 3.6-V VCC operation and the SN74LVC02A quadruple 2-input positive-NOR gate is designed for 1.65-V to 3.6-V VCC operation.

The ’LVC02A devices perform the Boolean function Y = A + B or Y = A B in positive logic.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

The SN54LVC02A is characterized for operation over the full military temperature range of –55°C to 125°C. The SN74LVC02A is characterized for operation from –40°C to 85°C.