SN74LV8151的技术资料

SN74LV8151的产品特征：
●2-V to 5.5-V V_CC Operation
● Max tpd of 15 ns at 5 V
● Schmitt-Trigger Inputs Allow for Slow Input Rise/Fall Time
● Polarity Control for Y Outputs Selects True or Complementary Logic
●Typical VOLP (Output Ground Bounce)<0.8 V at V_CC = 3.3 V, T_A = 25°C
● Typical VOHV (Output VOH Undershoot)>2.3 V at V_CC = 3.3 V, T_A = 25°C
● Ioff Supports Partial-Power-Down Mode Operation
● Supports Mixed-Mode Voltage Operation on All Ports
●Latch-Up Performance Exceeds 250 mA Per JESD 17
●ESD Protection Exceeds JESD 22 

SN74LV8151的技术参数：
Supply voltage range, V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, V_I (see Note 1) . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Voltage range applied to any output in the high-impedance
or power-off state, V_O (see Note 1)  . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Output voltage range, V_O (see Notes 1 and 2) . .. . . . . . −0.5 V to V_CC + 0.5 V
Input clamp current, I_IK (V_I < 0) .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
Output clamp current, I_OK (V_O < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Continuous output current, I_O (V_O = 0 to V_CC) . . . . . . . . . . . . . . . . . . ±35 mA
Continuous current through V_CC or GND  . . . . . . . . . . . . . . . . . . . . . . . ±70 mA
Package thermal impedance, θ_JA (see Note 3): NT package . . . . . . . . 67°C/W
                                                    (see Note 4): PW package . . . . . . . . 88°C/W
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
             2. This value is limited to 5.5 V maximum.
             3. The package thermal impedance is calculated in accordance with JESD 51-3.
             4. The package thermal impedance is calculated in accordance with JESD 51-7.

SN74LV8151的产品描述：
The SN74LV8151 is a 10-bit universal Schmitt-trigger buffer with 3-state outputs, designed for 2-V to 5.5-V VCC operation. The logic control (T/C) pin allows the user to configure Y1 to Y8 as noninverting or inverting outputs.When T/C is high, the Y outputs are noninverted (true logic ), and when T/C is low, the Y outputs are inverted complementary logic).

When output-enable (OE) input is low, the device passes data from Dn to Yn. When OE is high, the Y outputs are in the high-impedance state. The path A to P is a simple Schmitt-trigger buffer, and the path B to N is a simple Schmitt-trigger inverter.